High brightness Light Emitting Diodes (LEDs) are appearing more frequently in lighting applications. As these LEDs are used and planned for more general lighting systems, more emphasis is placed on locating these high power package systems in close proximity to each other to produce high lighting levels. This close packing can take the form of locating level 1 packages next to each other or locating chip-on-board (COB) LEDs next to one another. This leads to the question of how close can the LEDs be placed by the circuit board designer, and there has been little published work to show what spacing is possible in multiple LED systems. The spacing issue is also affected by the type of printed circuit board (PCB) used, which is normally a composite made up of a thin PCB bonded to a relatively thick metal substrate (a metal core PCB – MCPCB). The variables of dielectric, copper and solder layer thicknesses result in different proximities possible for LED spacing, and are especially critical for COB applications. This paper explores the spacing and placement of LEDs in tight array for 1-watt class devices using a design of experiments (DOE) methodology for analytical computations.
